Computer architecture
Inside the processor at A level: buses, the stored program, von Neumann and Harvard, registers and flags, the fetch-decode-execute cycle as register transfers, addressing modes, LMC and AQA assembly, interrupts, performance and parallel processors, and how input, output and storage devices work, with BugBot's microcontroller as the embedded example.
Start in the simulator- A9.1 Hardware, software and the stored program Internal components, the three buses and their widths, I/O controllers, the stored program concept, and von Neumann…
- A9.2 The processor and its registers The ALU, control unit and clock, general-purpose and dedicated registers, and the status flags an 8-bit ALU sets.
- A9.3 The fetch-decode-execute cycle in detail Register transfer notation, the buses at each step, a full register trace, and a stored program that plays notes.
- A9.4 Instruction sets and addressing modes Opcodes, operands and instruction formats; immediate, direct, indirect and indexed addressing.
- A9.5 Assembly language: the Little Man Computer OCR's LMC instruction set: tracing and writing programs with selection and iteration, run in Python.
- A9.6 AQA assembly language and bitwise operations AQA's instruction set, compare and branch, masks and shifts, and the bit fields that drive BugBot's motors.
- A9.7 Interrupts Sources of interrupts, polling, the check at the end of each cycle, saving the volatile environment on a stack, and…
- A9.8 Performance, pipelining and parallel processors Cores, cache, clock speed, word length and bus widths; pipelining; CISC and RISC; multicore systems and GPUs.
- A9.9 Input, output and storage How barcode readers, cameras, laser printers and RFID work; magnetic, optical and flash storage; RAM, ROM and virtual…
- A9.10 Project: a processor of your own Build a von Neumann machine with register transfers, addressing modes, flags and memory-mapped I/O that plays a scale…