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F9.4 The CPU and fetch-execute

Logic and computer systems · GCSE · OCR J277 1.1.1, AQA 8525 3.4.5, Edexcel 1CP2 3.1.1 · about 20 min

BugBotLab

What this lesson is about

The ALU, control unit, registers and buses, and tracing the fetch-decode-execute cycle.

Questions 6 marks in all

  1. [1 mark]Which register holds the address of the next instruction to fetch?

    1. AProgram counter
    2. BMemory data register
    3. CAccumulator
    4. DMemory address register
    Answer: A. The PC points at the next instruction.
  2. [1 mark]What does the ALU do?

    1. ACarries out arithmetic and logic operations
    2. BDecodes instructions
    3. CHolds the address to read from
    4. DSends the clock pulse
    Answer: A. Arithmetic logic unit: adding, subtracting, comparing.
  3. [1 mark]Put these steps of the cycle in order.

    Number the lines 1 to 4 to put them in the right order.

    1. The instruction is executed
    2. The address in the PC is copied to the MAR
    3. The instruction at that address is copied to the MDR
    4. The control unit decodes the instruction
    Answer:
    The address in the PC is copied to the MAR
    The instruction at that address is copied to the MDR
    The control unit decodes the instruction
    The instruction is executed

    Fetch, decode, execute, then back to fetch.

  4. [1 mark]Which bus carries addresses from the CPU to memory?

    1. AAddress bus
    2. BData bus
    3. CControl bus
    4. DUSB
    Answer: A. The address bus goes one way: CPU to memory.
  5. [1 mark]What does the memory data register hold?

    1. AThe data or instruction just read from memory, or about to be written
    2. BThe address of the next instruction
    3. CThe result of the last calculation only
    4. DThe clock speed
    Answer: A. The MDR is the CPU's end of the data bus.
  6. [1 mark]What does this program print?

    pc = 4
    mar = pc
    pc = pc + 1
    print(mar, pc)
    Answer:
    4 5

    The MAR gets the old PC value, then the PC moves on.

The task: trace the cycle

Complete the fetch-decode-execute loop so it runs the program in memory and supports LOAD, ADD, SUB, STORE, OUT and HALT. During each fetch, print fetch <MAR>: <instruction> (for example fetch 0: LOAD 6). The program outputs output: 35.

# the two lines every program starts with: the commands, then the robot
from bugbot import *
connect()

memory = ["LOAD 6", "SUB 7", "ADD 8", "STORE 9", "OUT 9", "HALT", 40, 12, 7, 0]
pc = mar = acc = 0
mdr = None

The hint students can ask for: Each time round: copy the program counter into the address register, fetch what is there, report it, then move the counter on. Decode and carry out the instruction after that, as the lesson's version does.

A solution

from bugbot import *
connect()
memory = ["LOAD 6", "SUB 7", "ADD 8", "STORE 9", "OUT 9", "HALT", 40, 12, 7, 0]
pc = mar = acc = 0
mdr = None
while True:
    mar = pc
    mdr = memory[mar]
    print(f"fetch {mar}: {mdr}")
    pc = pc + 1
    op, *arg = mdr.split()
    if op == "LOAD":
        acc = memory[int(arg[0])]
    elif op == "ADD":
        acc = acc + memory[int(arg[0])]
    elif op == "SUB":
        acc = acc - memory[int(arg[0])]
    elif op == "STORE":
        memory[int(arg[0])] = acc
    elif op == "OUT":
        print("output:", memory[int(arg[0])])
    elif op == "HALT":
        break

Any program that meets the task's checks is marked correct in the simulator; this is one way, not the only way.